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Advanced Lead-On-Chip Tape Design to Improve Thermal-Cycling Reliability in Semiconductor Devices

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A single-sided adhesive tape (SSAT) was invented to improve thermal-cycling reliability in semiconductor devices having the lead-on-chip (LOC) packaging structure. The SSAT is designed to have one hard base layer having many through-holes and a single ductile adhesive layer for the attachment to the bottom surface of the lead-frame. Numerical calculation represents that the magnitude of the maximum shear stress induced on the top surface of the device can be considerably reduced by the substitution of the conventional tape with the SSAT. Thus, the adoption of the SSAT might contribute to solving the fundamental problems associated with mismatched CTE performance in semiconductor devices having the LOC packaging structure.
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Keywords: ADHESIVE TAPE; RELIABILITY; SEMICONDUCTOR; SILICON; STRESS; WAFER

Document Type: Research Article

Publication date: January 1, 2015

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  • Science of Advanced Materials (SAM) is an interdisciplinary peer-reviewed journal consolidating research activities in all aspects of advanced materials in the fields of science, engineering and medicine into a single and unique reference source. SAM provides the means for materials scientists, chemists, physicists, biologists, engineers, ceramicists, metallurgists, theoreticians and technocrats to publish original research articles as reviews with author's photo and short biography, full research articles and communications of important new scientific and technological findings, encompassing the fundamental and applied research in all latest aspects of advanced materials.
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