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Influence of Grain and Grain Boundary Interfaces on Dielectric Relaxation of Ceria Nanocrystals Using Modulus Formalism Under Biased and Equilibrium Conditions

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Dielectric relaxation of ceria nanocrystals under biased condition for different grain sizes was in this study evaluated in modulus formalism using impedance spectroscopy. Prior to the impedance measurements, the ceria sample was calcined at 200 °C for 30 min and pressed into cylindrical pellets with 8 mm diameter and 1 mm thick by applying uniaxial four-ton pressure using a hydraulic press. This was then sintered at 300 °C, 450 °C, 600 °C and 900 °C for 30 min. Systematic analysis of modulus formalism data using commercial Z-view and Z-plot software's permitted, reliable extraction of dielectric relaxation time (τ) of ceria nanocrystals. The observed dielectric relaxation time (τ) at equilibrium condition varied from 10–5 to 10–3 s when the grain size of ceria nanocrystals was increased from 9 nm to 29 nm. But when the DC bias voltage was applied, the same dielectric relaxation time (τ) was tuned to ∼10–4 s for all the grain sizes of ceria nanocrystals, because of Schottky grain boundary potential barrier height (φb) suppression.
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Document Type: Short Communication

Publication date: March 1, 2018

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  • Nanoscience and Nanotechnology Letters (NNL) is a multidisciplinary peer-reviewed journal consolidating nanoscale research activities in all disciplines of science, engineering and medicine into a single and unique reference source. NNL provides the means for scientists, engineers, medical experts and technocrats to publish original short research articles as communications/letters of important new scientific and technological findings, encompassing the fundamental and applied research in all disciplines of the physical sciences, engineering and medicine.
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