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Circuits Design for Contactless Testing of Nano-Scale CMOS Devices and Circuits

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In this letter, a contactless testing system for nano-scale CMOS devices is presented. It includes parameter-specific ring oscillators, modulator and demodulator with capacitive coupling, which can be fully integrated in a standard CMOS technology. These ring oscillators are used to monitor process variations, while their outputs are modulated and coupled to a demodulator for measurement. The circuits are designed and simulated in standard 40 nm CMOS technology and are able to work robustly against process variations. The system is suitable in contactless testing or built-in self-test for nano-scale CMOS technology with power consumption less than 1 mW and data-rate of 10 Mbps at 3 GHz carrier.
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Keywords: CMOS; CONTACTLESS TESTING; NANO-SCALE; PROCESS VARIATIONS

Document Type: Short Communication

Publication date: September 1, 2012

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  • Nanoscience and Nanotechnology Letters (NNL) is a multidisciplinary peer-reviewed journal consolidating nanoscale research activities in all disciplines of science, engineering and medicine into a single and unique reference source. NNL provides the means for scientists, engineers, medical experts and technocrats to publish original short research articles as communications/letters of important new scientific and technological findings, encompassing the fundamental and applied research in all disciplines of the physical sciences, engineering and medicine.
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