Ferroelectric-Dielectric Mixed Buffer Layer for Enhanced Electrical Performance of Organic Ferroelectric Memory Transistors

We suggest a facile method to reduce the surface roughness of the ferroelectric polymer insulator to enhance the electrical performance of the ferroelectric field effect memory transistors (FeFET). Ferroelectric-dielectric mixed buffer layer was used to reduce the high surface roughness of the single layer ferroelectric polymer insulator. The FeFET with mixed buffer bilayer (BL-FeFET) showed more than 25 times higher on-current (3.40 μA) compared with single layer FeFET (130 nA). The BL-FeFET showed enhanced memory retention, higher memory on-off ratio than the conventional single layer FeFET (SL-FeFET). The enhancement of the electrical performance of the BL-FeFET can be attributed to the smoothening of the rough needle-like grain surface morphology of the ferroelectric polymer insulator in the SL-FeFET. This process of mixed buffer polymer insulator may provide a technological method for production of high-performance nonvolatile FeFET memory devices.