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Capacitance–Voltage Characterization of Tunnel Field Effect Transistors with a Si/SiGe Heterojunction

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A Si capping layer on a SiGe channel is essential to improve the interface properties between the SiGe channel and the gate insulator. Thus, devices with a Si capping layer should be analyzed to understand their electrical characteristics. In this paper, a strained Si/SiGe heterojunction TFET is investigated via capacitance–voltage measurements, which are rapid and non-destructive. The CV analysis method in a strained Si/SiGe heterojunction TFET is improved through TCAD simulations. Through a CV analysis, important parameters pertaining to devices, such as the layer thicknesses and threshold voltages, can be extracted.

Keywords: Capacitance; Centroid; Si Capping Layer; Tunnel Field Effect Transistor

Document Type: Research Article

Affiliations: Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering (SoEE) and Computer Science, Seoul National University (SNU), Seoul 151-742, Korea

Publication date: 01 October 2016

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  • Journal for Nanoscience and Nanotechnology (JNN) is an international and multidisciplinary peer-reviewed journal with a wide-ranging coverage, consolidating research activities in all areas of nanoscience and nanotechnology into a single and unique reference source. JNN is the first cross-disciplinary journal to publish original full research articles, rapid communications of important new scientific and technological findings, timely state-of-the-art reviews with author's photo and short biography, and current research news encompassing the fundamental and applied research in all disciplines of science, engineering and medicine.
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