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Wafer-Level Self-Aligned Nano Tubular Structures and Templates for Device Applications

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A method to fabricate self-aligned nano-scale tubular structures is introduced and investigated. These tubular structures, can be fabricated on wafer-level using common CMOS technologies, are robust and cannot be removed through standard etching or resist strip techniques. This method has shown the potential to be used in different nano device applications since the size of nano-scale tubular structures is adjustable. In addition, these structures can be fabricated as nano-scale templates in advanced device applications.
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Document Type: Research Article

Publication date: 01 December 2010

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  • Journal for Nanoscience and Nanotechnology (JNN) is an international and multidisciplinary peer-reviewed journal with a wide-ranging coverage, consolidating research activities in all areas of nanoscience and nanotechnology into a single and unique reference source. JNN is the first cross-disciplinary journal to publish original full research articles, rapid communications of important new scientific and technological findings, timely state-of-the-art reviews with author's photo and short biography, and current research news encompassing the fundamental and applied research in all disciplines of science, engineering and medicine.
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