Manufacturing of Planar Field-Effect Heterotransistors with Decreasing Their Dimensions and Simplification of Their Constructions
In this paper we introduce an approach to decrease dimensions of planar field-effect transistors by using dopant diffusion in a semiconductor heterostructure and optimization of annealing time. Some conditions to maximal increasing of the effect have been formulated. We also introduce an approach to decrease price of manufacturing of considered transistors due to simplification of their construction.
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Document Type: Research Article
Publication date: December 1, 2013
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