Self-Timed SRAM for Energy Harvesting Systems
Portable digital systems need to be not just low power but power efficient as they are powered by low batteries or energy harvesters. Energy harvesting systems tend to provide nondeterministic, rather than stable, power over time. Existing memory systems use delay elements to cope with the problems under different Vdds. However, this introduces huge penalties on performance, as the delay elements need to follow the worst case timing assumption under the worst environment. In this paper, the latency mismatch between memory cells and the corresponding controller using typical delay elements is investigated and found to be highly variable for different Vdd values. A Speed Independent (SI) SRAM memory is then developed which can help avoid such mismatch problems. It can also be used to replace typical delay lines for use in bundled-data memory banks. A 1 Kb SI memory bank is implemented based on this method and analysed in terms of the latency and power consumption. In addition, a 1 Kb bundled-data memory bank using SI SRAM as delay bundling devices is also implemented. Comparative studies demonstrate the advantages and disadvantages of these methods.
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Document Type: Research Article
Publication date: April 1, 2011
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- The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.
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