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Home / Journal of Low Power Electronics, Volume 7, Number 1
The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.

Publisher: American Scientific Publishers

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Volume 7, Number 1, February 2011

A Special Issue

A Special Issue on Low Power Design and Verification Techniques
pp. 1-1(1)
Author: Verma, Shireesh

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Research Articles

A Multi-Processing Systems-on-Chip Native Simulation Framework for Power and Thermal-Aware Design
pp. 2-16(15)
Authors: Calvo, Daniel; González, Pablo; Díaz, Luís; Posadas, Héctor; Sánchez, Pablo; Villar, Eugenio; Acquaviva, Andrea; Macii, Enrico

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Dynamic Reconfiguration of Two-Level Cache Hierarchy in Real-Time Embedded Systems
pp. 17-28(12)
Authors: Wang, Weixun; Mishra, Prabhat

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Efficient Evaluation of Power/Area/Latency Design Trade-Offs for Coarse-Grained Reconfigurable Processor Arrays
pp. 29-40(12)
Authors: Kissler, Dmitrij; Hannig, Frank; Teich, Jürgen

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Power Management Design and Verification
pp. 41-48(8)
Authors: Kapoor, Bhanu; Verma, Shireesh

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Low-Power, Battery-Operated, Large-Bandwidth Analog Integrated DC/DC Step-Down Converters
pp. 49-60(12)
Authors: Bathily, Malal; Allard, Bruno; Hasbani, Frederic; Pinon, Vincent

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Design Matrix Analysis for Capacitive Interpolation Flash ADC
pp. 61-70(10)
Authors: Tang, He; Zhao, Hui; Fan, Siqiang; Wang, Xin; Lin, Lin; Fang, Qiang; Liu, Jian; Wang, Albert

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On-Chip Single-Inductor Multiple-Output Power Converter Design with Adaptive Cross Regulation and Supply Variation Control for Power-Efficient VLSI Systems
pp. 71-86(16)
Authors: Zhang, Yi; Bondade, Rajdeep; Ma, Dongsheng

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Oxide-Tunneling Leakage Suppressed SRAM for Sub-65-nm Very Large Scale Integrated Circuits
pp. 87-95(9)
Authors: Bong, Ji-Hye; Jo, Kwan-Hee; Min, Kyeong-Sik; Kang, Sung-Mo

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A Bit-Interleaved 2-Port Subthreshold 6T SRAM Array with High Write-Ability and SNM-Free Read in 90 nm
pp. 96-109(14)
Authors: Sil, Abhijit; Bayoumi, Magdy

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Cyber-Physical Thermal Management of 3D Multi-Core Cache-Processor System with Microfluidic Cooling
pp. 110-121(12)
Authors: Qian, Hanhua; Huang, Xiwei; Yu, Hao; Chang, Chip Hong

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