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Robust Fabrication Method for Silicon Nanowire Field Effect Transistors for Sensing Applications

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This paper demonstrates a new method for the top-down production of silicon nanowire field effect transistors for sensing applications. A simple and robust method for the fabrication of these devices is described, using only conventional CMOS (Complementary Metal Oxide Semiconductor) processing techniques making it manufacturable on large scale in a broad range of production facilities. Moreover, the process is flexible in terms of the choice of the type of front oxide of the transistor, as it is applied in a separate, independent step from the application of the surrounding oxide. In case ultimate small dimensions are required that go beyond the wafer stepper resolution, the use of e-beam technology to produce even smaller structures can be easily integrated. Furthermore, the use of a passivation layer opens possibilities for adding selectivity via surface modification on silicon dioxide and silicon. After a detailed description of the process, the electrical characteristics of the devices are shown together with data on the device reliability, indicating that the process is easy to manufacture, has a large yield and results in sensor devices with electrical characteristics in the desired regime.
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Document Type: Research Article

Publication date: August 1, 2013

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  • Journal for Nanoscience and Nanotechnology (JNN) is an international and multidisciplinary peer-reviewed journal with a wide-ranging coverage, consolidating research activities in all areas of nanoscience and nanotechnology into a single and unique reference source. JNN is the first cross-disciplinary journal to publish original full research articles, rapid communications of important new scientific and technological findings, timely state-of-the-art reviews with author's photo and short biography, and current research news encompassing the fundamental and applied research in all disciplines of science, engineering and medicine.
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