Search Results

An improved heuristic and an exact algorithm for the 2D strip and bin packing problem

Authors: Bekrar, Abdelghani; Kacem, Imed; Chu, Chengbin; Sadfi, Cherif

Source: International Journal of Product Development, Volume 10, Numbers 1-2, 3 December 2009 , pp. 217-240(24)

Publisher: Inderscience Publishers

Dual channel addition based FFT processor architecture for signal and image processing

Authors: Sahoo, Subhendu Kumar; Shekhar, Chandra; Kodali, Sudeepti; Asati, Abhijit R.; Gupta, Anu

Source: International Journal of High Performance Systems Architecture, Volume 2, Number 1, 10 December 2009 , pp. 35-45(11)

Publisher: Inderscience Publishers

A Degree-Based Clustering Technique for VLSI Placement

Authors: Huang, Jie; Behjat, Laleh; Rakai, Logan; Li, Jianhua

Source: Journal of Algorithms & Computational Technology, Volume 3, Number 3, September 2009 , pp. 425-441(17)

Publisher: Multi-Science Publishing Co Ltd

The Theta-Model: achieving synchrony without clocks

Authors: Widder, Josef; Schmid, Ulrich

Source: Distributed Computing, Volume 22, Number 1, April 2009 , pp. 29-47(19)

Publisher: Springer

A Special Issue on the “22nd IEEE International Conference on VLSI Design” New Delhi, India, 5-9 January 2009

Authors: Panda, Rajendran; Panda, Preeti Ranjan

Source: Journal of Low Power Electronics, Volume 5, Number 3, October 2009 , pp. 255-256(2)

Publisher: American Scientific Publishers

Low-Power VLSI Design of LDPC Decoder Using Dynamic Voltage and Frequency Scaling for Additive White Gaussian Noise Channels

Authors: Wang, Weihuang; Kim, Euncheol; Gunnam, Kiran K.; Choi, Gwan S.

Source: Journal of Low Power Electronics, Volume 5, Number 3, October 2009 , pp. 303-312(10)

Publisher: American Scientific Publishers

Design and Evaluation of an Energy-Delay-Area Efficient Datapath for Coarse-Grain Reconfigurable Computing Systems

Authors: Purohit, Sohan; Lanuzza, Marco; Perri, Stefania; Corsonello, Pasquale; Margala, Martin

Source: Journal of Low Power Electronics, Volume 5, Number 3, October 2009 , pp. 326-338(13)

Publisher: American Scientific Publishers

High speed, low power VLSI CMOS vision sensor for geometric centre object tracking

Authors: Habibi, Mehdi; Sayedi, Masoud

Source: International Journal of Electronics, Volume 96, Number 8, August 2009 , pp. 821-836(16)

Publisher: Taylor and Francis Ltd

An area-efficient very large scale integration architecture for modified Euclidean algorithm with dynamic storage technique

Authors: Li, Xiao-Chun; Mao, Jun-Fa

Source: International Journal of Electronics, Volume 96, Number 8, August 2009 , pp. 837-842(6)

Publisher: Taylor and Francis Ltd

Selective Forward Body Bias for High Speed and Low Power SRAMs

Authors: Bollapalli, Kalyana C.; Garg, Rajesh; Gulati, Kanupriya; Khatri, Sunil P.

Source: Journal of Low Power Electronics, Volume 5, Number 2, August 2009 , pp. 185-195(11)

Publisher: American Scientific Publishers

Fixed-priority scheduling to reduce both the dynamic and leakage energy on variable voltage processors

Authors: Quan, Gang; Niu, Linwei; Mochocki, Bren; Hu, Xiaobo S.

Source: International Journal of Embedded Systems, Volume 4, Number 2, 20 August 2009 , pp. 127-140(14)

Publisher: Inderscience Publishers

Software reliability estimation of computer relaying for transmission line protection using user-oriented software reliability model

Authors: Anil, Aditya; Mohanta, D.K.; Roy, D. Sinha; Panda, A.K.

Source: International Journal of Power and Energy Conversion, Volume 1, Numbers 2-3, 20 August 2009 , pp. 300-312(13)

Publisher: Inderscience Publishers

Novel layout technique for on-chip inductance minimization

Authors: Dao, V.T.S.; Etoh, T.G.; Tanaka, M.; Akino, T.

Source: Microelectronics International, Volume 26, Number 3, 2009 , pp. 3-8(6)

Publisher: Emerald Group Publishing Limited

Effects of process variation in VLSI interconnects - a technical review

Authors: Verma, K.G.; Kaushik, B.K.; Singh, R.

Source: Microelectronics International, Volume 26, Number 3, 2009 , pp. 49-55(7)

Publisher: Emerald Group Publishing Limited

Mixed carbon nanotube bundles for interconnect applications

Authors: Subash, Suraj; Chowdhury, Masud

Source: International Journal of Electronics, Volume 96, Number 6, June 2009 , pp. 657-671(15)

Publisher: Taylor and Francis Ltd

Analytical drain current model for nanoscale strained-Si/SiGe MOSFETs

Authors: Batwani, Himanshu; Gaur, Mayank; Kumar, M. Jagadesh

Source: COMPEL: Int J for Computation and Maths. in Electrical and Electronic Eng., Volume 28, Number 2, 2009 , pp. 353-371(19)

Publisher: Emerald Group Publishing Limited

Beam damage suppression of low- porous SiOC films by cryo-electron-energy loss spectroscopy (EELS)

Authors: Otsuka, Yuji; Shimizu, Yumiko; Tanaka, Isao

Source: Journal of Electron Microscopy, Volume 58, Number 2, 4 April 2009 , pp. 29-34(6)

Publisher: Oxford University Press

An annotated bibliography of GRASP-Part II: Applications

Authors: Festa, Paola; Resende, Mauricio G. C.

Source: International Transactions in Operational Research, Volume 16, Number 2, March 2009 , pp. 131-172(42)

Publisher: Blackwell Publishing

Single Spin Logic Realization of a Robust Spatial Domain Image Watermarking

Authors: Ghosh, Ankush; Basu, A.; Das, T.S.; Mankar, V.H.; Samanta, D.; Sarkar, Subir Kumar

Source: Advanced Science Letters, Volume 2, Number 1, March 2009 , pp. 86-96(11)

Publisher: American Scientific Publishers

An intelligent multi-layer net routing method based on minimum spanning tree

Authors: Qiu, Wei; Yang, Ping

Source: International Journal of Materials and Structural Integrity, Volume 2, Number 4, 6 February 2009 , pp. 332-344(13)

Publisher: Inderscience Publishers