Search Results

A novel nanoscale high breakdown voltage lateral bipolar junction transistor on silicon-on-insulator

Authors: Loan, Sajad A.; Qureshi, S.; Iyer, S. Sundar Kumar

Source: International Journal of Nanomanufacturing, Volume 4, Numbers 1-2, 7 September 2009 , pp. 42-50(9)

Publisher: Inderscience Publishers

Size Effects and Performance Assessment in Nanoscale Multigate MOSFET Structures

Authors: Mohamed, Mohamed; Aksamija, Zlatan; Godoy, Andrés; Martin, Pierre; Hahm, Hyung-Seok; Lee, Wonsok; Lee, Kyu Il; Ravaioli, Umberto

Source: Journal of Computational and Theoretical Nanoscience, Volume 6, Number 8, August 2009 , pp. 1927-1936(10)

Publisher: American Scientific Publishers

3D Monte-Carlo device simulations using an effective quantum potential including electron-electron interactions

Authors: Heitzinger, Clemens; Ringhofer, Christian; Ahmed, Shaikh; Vasileska, Dragica

Source: Journal of Computational Electronics, Volume 6, Numbers 1-3, September 2007 , pp. 15-18(4)

Publisher: Springer

Electron-Phonon Interaction Model and Prediction of Thermal Energy Transport in SOI Transistor

Authors: Jin, Jae Sik; Lee, Joon Sik

Source: Journal of Nanoscience and Nanotechnology, Volume 7, Number 11, November 2007 , pp. 4094-4100(7)

Publisher: American Scientific Publishers

The thin SOI TGLDMOS transistor: a suitable power structure for low voltage applications

Authors: Cortés, I.; Fernández-Martínez, P.; Flores, D.; Hidalgo, S.; Rebollo, J.

Source: Semiconductor Science and Technology, Volume 22, Number 10, October 2007 , pp. 1183-1188(6)

Publisher: Institute of Physics Publishing

Recessed source/drain for sub-50 nm UTB SOI MOSFET

Authors: Ke, Wei; Han, Xu; Li, Dingyu; Wang, Xinan; Zhang, Tianyi; Han, Ruqi; Zhang, Shengdong

Source: Semiconductor Science and Technology, Volume 22, Number 5, May 2007 , pp. 577-583(7)

Publisher: Institute of Physics Publishing

Physics of ultrathin-body silicon-on-insulator Schottky-barrier field-effect transistors

Authors: Knoch, J.; Zhang, M.; Appenzeller, J.; Mantl, S.

Source: Applied Physics A, Volume 87, Number 3, June 2007 , pp. 351-357(7)

Publisher: Springer

Turning the world vertical: MOSFETs with current flow perpendicular to the wafer surface

Author: Moers, J.

Source: Applied Physics A, Volume 87, Number 3, June 2007 , pp. 531-537(7)

Publisher: Springer

On the feasibility of superjunction thick-SOI power LDMOS transistors for RF base station applications

Authors: Cortes, I.; Roig, J.; Flores, D.; Hidalgo, S.; Rebollo, J.

Source: Semiconductor Science and Technology, Volume 22, Number 2, February 2007 , pp. 1-9(9)

Publisher: Institute of Physics Publishing

The impact of silicon nano-wire technology on the design of single-work-function CMOS transistors and circuits

Authors: Bindal, Ahmet; Hamedi-Hagh, Sotoudeh

Source: Nanotechnology, Volume 17, Number 17, 14 September 2006 , pp. 4340-4351(12)

Publisher: Institute of Physics Publishing

Analog performance of double gate SOI transistors

Authors: Alam, M. S.; Lim, T. C.; Armstrong, G. A.

Source: International Journal of Electronics, Volume 93, Number 1, Number 1/January 2006 , pp. 1-18(18)

Publisher: Taylor and Francis Ltd

Radiation Hardness Improvement of Separation-by-Implantation-of-Oxygen/Silicon-on-Insulator Material by Nitrogen Ion Implantation

Authors: Zhang, Enxia; Sun, Jiayin; Chen, Jing; Zhang, Zhengxuan; Wang, Xi; Li, Ning; Zhang, Guoqiang; Liu, Zhongli

Source: Journal of Electronic Materials, Volume 34, Number 11, November 2005 , pp. 53-56(4)

Publisher: Springer

SiGe -channel field-effect transistors on SIMOX substrates

Author: San Lein Wu,

Source: Semiconductor Science and Technology, Volume 20, Number 6, June 2005 , pp. 559-562(4)

Publisher: Institute of Physics Publishing

Comparative Assessment of Adaptive Body-Bias SOI Pass-Transistor Logic

Authors: Cho Geun; Chen Tom

Source: Analog Integrated Circuits and Signal Processing, Volume 42, Number 3, March 2005 , pp. 219-229(11)

Publisher: Springer

Realizing high-voltage thin film lateral bipolar transistors on SOI with a collector-tub

Authors: Roy, Sukhendu Deb; Kumar, M. Jagadesh

Source: Microelectronics International, Volume 22, Number 1, 2005 , pp. 3-9(7)

Publisher: Emerald Group Publishing Limited

Monte Carlo Simulation of Nanoscale SOI MOSFETs

Authors: A. A. Sidorov; V. V. V'yurkov; A. A. Orlikovsky

Source: Russian Microelectronics, Volume 33, Number 4, July 2004 , pp. 195-205(11)

Publisher: MAIK Nauka/Interperiodica

2D ensemble Monte Carlo modelling of bulk and FD SOI MOSFETs: active layer thickness and noise performance

Authors: Rengel R.; Pardo D.; Martín-Martínez M.J.

Source: Semiconductor Science and Technology, Volume 19, Number 4, April 2004 , pp. S199-S201(1)

Publisher: Institute of Physics Publishing

Triple-gate metal–oxide–semiconductor field effect transistors fabricated with interference lithography

Authors: Moormann C.; Lerch H.; Möller M.; Vratzov B.; Kurz H.; Lemme M.C.

Source: Nanotechnology, Volume 15, Number 4, April 2004 , pp. S208-S210(1)

Publisher: Institute of Physics Publishing

Patterned buried oxide layers under a single MOSFET to improve the device performance

Authors: Dong Y.; Chen M.; Chen J.; Wang X.; He P.; Lin X.; Tian L.; Li Z.

Source: Semiconductor Science and Technology, Volume 19, Number 3, March 2004 , pp. L25-L28(1)

Publisher: Institute of Physics Publishing

Floating body effects model for fault simulation of fully depleted CMOS/SOI circuits

Authors: De Venuto D.; Ohletz M.J.

Source: Microelectronics Journal, Volume 34, Number 10, October 2003 , pp. 889-895(7)

Publisher: Elsevier