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2 articles with title/keywords/abstract containing SIGN-OFF VERIFICATION

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Power Supply Selective Mapping for Accurate Timing Analysis

Authors: Forzan, Cristiano; Pandini, Davide; Graziano, Mariagrazia

Source: Journal of Low Power Electronics, Volume 2, Number 1, April 2006 , pp. 105-112(8)

Publisher: American Scientific Publishers

Timing Challenges for Very Deep Sub-Micron (VDSM) IC

Authors: Lin I.; Chen C-I.H.

Source: VLSI Design, Volume 15, Number 3, 1 January 2002 , pp. 557-562(6)

Publisher: Taylor and Francis Ltd

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