Search Results

Adaptive real-time image processing exploiting two dimensional reconfigurable architecture

Authors: Braun, Lars; Göhringer, Diana; Perschke, Thomas; Schatz, Volker; Hübner, Michael; Becker, Jürgen

Source: Journal of Real-Time Image Processing, Volume 4, Number 2, June 2009 , pp. 109-125(17)

Publisher: Springer

Low-Power Coding for Networks-on-Chip with Virtual Channels

Authors: García-Ortiz, Alberto; Indrusiak, Leandro S.; Murgan, Tudor; Glesner, Manfred

Source: Journal of Low Power Electronics, Volume 5, Number 1, April 2009 , pp. 77-84(8)

Publisher: American Scientific Publishers

Network-on-chip architecture design based on mesh-of-tree deterministic routing topology

Authors: Kundu, Santanu; Chattopadhyay, Santanu

Source: International Journal of High Performance Systems Architecture, Volume 1, Number 3, 4 December 2008 , pp. 163-182(20)

Publisher: Inderscience Publishers

Design of a router for network-on-chip

Authors: Bahn, Jun Ho; Lee, Seung Eun; Bagherzadeh, Nader

Source: International Journal of High Performance Systems Architecture, Volume 1, Number 2, 14 October 2007 , pp. 98-105(8)

Publisher: Inderscience Publishers

Integrated modelling and generation of a reconfigurable network-on-chip

Authors: Ching, Doris; Schaumont, Patrick; Verbauwhede, Ingrid

Source: International Journal of Embedded Systems, Volume 1, Numbers 3-4, 5 June 2006 , pp. 218-227(10)

Publisher: Inderscience Publishers

Integrated modelling and generation of a reconfigurable network-on-chip

Authors: Ching, Doris; Schaumont, Patrick; Verbauwhede, Ingrid

Source: International Journal of Embedded Systems, Volume 1, Numbers 3-4, 5 June 2006 , pp. 218-227(10)

Publisher: Inderscience Publishers

Communication Power Optimization for Network-on-Chip Architectures

Authors: Shin, Dongkun; Kim, Jihong

Source: Journal of Low Power Electronics, Volume 2, Number 2, August 2006 , pp. 165-176(12)

Publisher: American Scientific Publishers

HIBI Communication Network for System-on-Chip

Authors: Salminen, Erno; Kangas, Tero; Hämäläinen, Timo; Riihimäki, Jouni; Lahtinen, Vesa; Kuusilinna, Kimmo

Source: The Journal of VLSI Signal Processing, Volume 43, Numbers 2-3, June 2006 , pp. 185-205(21)

Publisher: Springer