Search Results

Design of Low Power Parallel Multiplier

Authors: Badghare, Rahul M.; Mangal, Sanjiv Kumar; Deshmukh, Raghavendra B.; Patrikar, Rajendra M.

Source: Journal of Low Power Electronics, Volume 5, Number 1, April 2009 , pp. 31-39(9)

Publisher: American Scientific Publishers

Educational Tool for the Implementation of Electric Drives Control System with Real Time Data Exchange

Authors: Ramirez, Dionisio; Martinez, Sergio; Rodriguez, Jaime; Carrero, Carmelo; Blanco, Marcos

Source: International Journal of Engineering Education, Volume 25, Number 1, January 2009 , pp. 24-32(9)

Publisher: International Journal of Engineering Education

Theory of the adjustable speed generation systems

Authors: Koczara, Wlodzimierz; Chlodnicki, Zdzislaw; Ernest, Emil; Krasnodebski, Artur; Seliga, Robert; Brown, Neil L.; Kaminski, Bartlomiej; Al-Tayie, Jawad

Source: COMPEL: Int J for Computation and Maths. in Electrical and Electronic Eng., Volume 27, Number 5, 2008 , pp. 1162-1177(16)

Publisher: Emerald Group Publishing Limited

Real-time implementation of harmonic elimination PWM technique for induction motor

Authors: Bouchhida, Ouahid; Benmansour, Khelifa; Cherifi, Abderrezzek; Boucherit, Mohamed Seghir

Source: International Journal of Modelling, Identification and Control, Volume 5, Number 2, 16 December 2008 , pp. 127-135(9)

Publisher: Inderscience Publishers

Design and analysis of an LC trap/LCR output filter for a single-phase NPC three-level inverter

Authors: Kim, Soo-Hong; Kim, Yoon-Ho

Source: International Journal of Electronics, Volume 95, Number 12, January 2008 , pp. 1279-1292(14)

Publisher: Taylor and Francis Ltd

Fast and accurate power estimation of FPGA DSP components based on high-level switching activity models

Authors: Jevtic, Ruzica; Carreras, Carlos; Caffarena, Gabriel

Source: International Journal of Electronics, Volume 95, Number 7, July 2008 , pp. 653-668(16)

Publisher: Taylor and Francis Ltd

ASIP-based reconfigurable architectures for power-efficient and real-time image/video processing

Authors: Saponara, Sergio; Casula, Michele; Fanucci, Luca

Source: Journal of Real-Time Image Processing, Volume 3, Number 3, September 2008 , pp. 201-216(16)

Publisher: Springer

Low-Power Heterogeneous Systems-on-Chips

Authors: Piguet, Christian; Nagel, Jean-Luc; Peiris, Vincent; Gyger, Stève; Séverac, Daniel; Morgan, Marc; Masgonty, Jean-Marc

Source: Journal of Low Power Electronics, Volume 4, Number 2, August 2008 , pp. 111-126(16)

Publisher: American Scientific Publishers

Computation Partitioning and Reuse for Power Efficient High Performance Digital Signal Processing

Authors: Banerjee, Nilanjan; Roy, Kaushik

Source: Journal of Low Power Electronics, Volume 3, Number 3, December 2007 , pp. 254-270(17)

Publisher: American Scientific Publishers

Signal Activity Analysis for High-Level Power Estimation in Time-Shared Linear Systems

Authors: García-Ortiz, Alberto; Murgan, Tudor; Glesner, Manfred

Source: Journal of Low Power Electronics, Volume 3, Number 2, August 2007 , pp. 189-198(10)

Publisher: American Scientific Publishers

Evaluation of an Adaptive Dynamic Voltage Scaling Scheme for Hard Real-Time Applications

Authors: Dolwin, Craig A.; Yassine, Hatem

Source: Journal of Low Power Electronics, Volume 3, Number 2, August 2007 , pp. 217-221(5)

Publisher: American Scientific Publishers

Reducing Off-Chip Memory Access via Stream-Conscious Tiling on Multimedia Applications

Authors: Zhang, Chunhui; Kurdahi, Fadi

Source: International Journal of Parallel Programming, Volume 35, Number 1, February 2007 , pp. 63-98(36)

Publisher: Springer

A Scalable Configurable Architecture for Advanced Wireless Communication Algorithms

Authors: Sarrigeorgidis, Konstantinos; Rabaey, Jan

Source: The Journal of VLSI Signal Processing, Volume 45, Number 3, December 2006 , pp. 127-151(25)

Publisher: Springer

An Advanced Low Power and Versatile CMOS Current Driver for Multi-Electrode Cochlear Implant Microstimulator

Authors: Ghorbel, Mohamed; Hamida, Ahmed Ben; Samet, Mounir; Thomas, Jean

Source: Journal of Low Power Electronics, Volume 2, Number 3, December 2006 , pp. 442-455(14)

Publisher: American Scientific Publishers

Models for Architectural Power and Power Grid Noise Analysis on Data Bus

Authors: Gao, Lijun; Parhi, Keshab K.

Source: The Journal of VLSI Signal Processing, Volume 44, Numbers 1-2, August 2006 , pp. 25-46(22)

Publisher: Springer

A Low-Energy Reconfigurable Fabric for the SuperCISC Architecture

Authors: Mehta, Gayatri; Stander, Justin; Lucas, Josh; Hoare, Raymond R.; Hunsaker, Brady; Jones, Alex K.

Source: Journal of Low Power Electronics, Volume 2, Number 2, August 2006 , pp. 148-164(17)

Publisher: American Scientific Publishers

Software Level Power Consumption Models and Power Saving Techniques for Embedded DSP Processors

Authors: Bleakley, C.J.; Casas-Sanchez, Miguel; Rizo-Morente, Jose

Source: Journal of Low Power Electronics, Volume 2, Number 2, August 2006 , pp. 281-290(10)

Publisher: American Scientific Publishers

Scheduling and Partitioning Schemes for Low Power Designs Using Multiple Supply Voltages

Authors: Wang, Ling; Jiang, Yingtao; Selvaraj, Henry

Source: The Journal of Supercomputing, Volume 35, Number 1, January 2006 , pp. 93-113(21)

Publisher: Springer

Algorithms and analysis of scheduling for low-power high-performance DSP on VLIW processors

Authors: Shao, Zili; Zhuge, Qingfeng; Zhang, Youtao; Sha, Edwin H-M.

Source: International Journal of High Performance Computing and Networking, Volume 1, Numbers 1-2, 5 August 2005 , pp. 4-16(13)

Publisher: Inderscience Publishers

Clinical Trial of a Low-cost, High Power Compression Hearing Aid

Authors: Parving, Agnete; Christensen, Birger; Nielsen, Jorgen; Konrádsson, Konrád

Source: Audiological Medicine, Volume 3, Number 2, June 2005 , pp. 76-81(6)

Publisher: Informa Healthcare