Semiconductor Device Scaling: The Role of Ballistic Transport
Nanoelectronics (including nanomagnetics and nanophotonics) generally refers to nanometer scale devices, and to circuits and architectures which are composed of these devices. Continued scaling of the devices into the nanometer range has led to enhanced information processing systems. Generally, this scaling has arisen from three major sources, one of which is reduction of the physical gate length of individual transistors. Until recently, this has also allowed an increase in the clock speed of the chip, but power considerations have halted this to levels around 4GHz in Si. Indeed, there are indications that scaling itself may be finished by the end of this decade. One aspect of this is the onset of "problems" in device operation, one of which is ballistic transport. In this paper, we discuss the rationale for ballistic transport and how it will appear in device characteristics.
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Document Type: Research Article
Publication date: 01 September 2007
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- Journal of Computational and Theoretical Nanoscience is an international peer-reviewed journal with a wide-ranging coverage, consolidates research activities in all aspects of computational and theoretical nanoscience into a single reference source. This journal offers scientists and engineers peer-reviewed research papers in all aspects of computational and theoretical nanoscience and nanotechnology in chemistry, physics, materials science, engineering and biology to publish original full papers and timely state-of-the-art reviews and short communications encompassing the fundamental and applied research.
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