In the field of fractional divider phase-locked-loops (PLL) there exist several different methods for generating the division factor sequences controlling the programmable frequency divider in the PLL. The overall behaviour of the fractional PLL strongly depends on the proper choice of the division factor sequence. Therefore some concepts for generating these fractional sequences are discussed and the behaviour of the division factor sequences will be analysed with respect to the overall PLL behaviour. In addition some sources of disturbances are mentioned.
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Low phase noise
Document Type: Original Article
Ruhr-Universität Bochum, Institut für Hochfrequenztechnik, Universitätsstraße 150, D-44780 Bochum, Germany. Phone: +49(0)234/322 6496, Fax: +49(0)234/321 4167. E-mail: email@example.com
Publication date: 2001-10-01