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Architectures and technologies for an optoelectronic VLSI

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Abstract: The article discusses the possibilities of using short-distance optical interconnects in digital computing systems. It is postulated that high-dense optical free-space optical interconnects in the chip-to-chip area offer the possibility to overcome the serious pin limitation problem for VLSI circuits. The current investigated technologies for an optoelectronic three-dimensional VLSI are briefly presented. It is pointed out that the possible high channel density offered by optoelectronic interconnect technology is only exploited if the processor architecture supports this. The author presents a list of eight features an architecture should largely fulfil to guarantee an efficient use of high-dense optical interconnects. Examples for such architectures are presented. In a parallel optoelectronic digital signal processing unit an increase in the throughput performance about a factor of 70 compared with pure electronic solutions is achievable due to a parallel optical processor-memory coupling. Investigations of a prototype circuit show that three magnitudes better configuration times can by achieved by using optics in dynamically reconfigurable hardware compared to pure electronics. In closing a solution for a noise robust receiver circuit is presented to realise smart detector circuits in cost-effective standard CMOS processes.

Keywords: Optoelectronic VLSI; optical interconnects; optics in computing; reconfigurable computing

Document Type: Original Article

DOI: http://dx.doi.org/10.1078/0030-4026-00057

Affiliations: Friedrich-Schiller-Universität Jena, Institut für Informatik, Ernst-Abbe-Platz 1–4, 07743 Jena, Germany

Publication date: July 1, 2001

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