Allocating solder-paste printing inspection in high-volume electronics manufacturing

Authors: Jorge Valenzuela¹; Jeffrey Smith¹; John Evans¹

Source: IIE Transactions, Volume 36, Number 12, December 2004 , pp. 1171-1181(11)

Publisher: Taylor and Francis Ltd

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Abstract:

The paper describes an optimization model for allocating solder-paste printing inspection that explicitly considers the economic tradeoff between board yield and inspection accuracy. The paper also shows that the use of a heuristic solution method for solving the post-printing inspection allocation model is effective and efficient for high-volume electronics manufacturing. The model has been developed using real production and visual inspection data provided by a high-volume electronics manufacturer located in Huntsville, AL. In addition, randomly generated problems are used to evaluate the performance of the proposed heuristic. Results from a large case study show that when compared with a full post-printing inspection, the heuristic approach provides a solution that can increase the total expected gains by 15%.

Document Type: Research article

DOI: 10.1080/07408170490507710

Affiliations: 1: Department of Industrial and Systems Engineering, Auburn University, AL, USA

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