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Volume 47, Number 2, May 2007

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On Hardware Implementations Of DCT and Quantization Blocks for H.264/AVC
pp. 93-102(10)
Authors: Kordasiewicz, Roman; Shirani, Shahram

Energy-efficient Hardware Accelerators for the SA-DCT and Its Inverse
pp. 127-152(26)
Authors: Kinane, Andrew; O'Connor, Noel

Maximize Parallelism Minimize Overhead for Nested Loops via Loop Striping
pp. 153-167(15)
Authors: Xue, Chun; Shao, Zili; Sha, Edwin

Scheme for Reducing the Storage Requirements of FFT Twiddle Factors on FPGAs
pp. 183-187(5)
Authors: Sansaloni, T.; Pérez-Pascual, A.; Torres, V.; Valls, J.

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