The Journal of VLSI Signal Processing

A Scalable Configurable Architecture for Advanced Wireless Communication Algorithms
pp. 127-151(25)
Authors: Sarrigeorgidis, Konstantinos; Rabaey, Jan

Direct Digital Frequency Synthesis Based on a Two-Level Table-Lookup Scheme
pp. 153-160(8)
Authors: Chen, Sau-Gee; Chih, Jen-Chuan; Chou, Jun-Yi

High Throughput Parallel-Pipeline 2-D DCT/IDCT Processor Chip
pp. 161-175(15)
Authors: Ruiz, G.; Michell, J.; Burón, A.

Temperature-Aware Task Allocation and Scheduling for Embedded Multiprocessor Systems-on-Chip (MPSoC) Design
pp. 177-189(13)
Authors: Xie, Yuan; Hung, Wei-lun