The Journal of VLSI Signal Processing

A Low Complexity and Low Power SoC Design Architecture for Adaptive MAI Suppression in CDMA Systems
pp. 195-217(23)
Authors: Guo, Yuanbin; Cavallaro, Joseph

A VLSI Architecture of the Square Root Algorithm for V-BLAST Detection
pp. 219-230(12)
Authors: Guo, Zhan; Nilsson, Peter

Resource Sharing Combined with Layout Effects in High-Level Synthesis
pp. 231-243(13)
Authors: Um, Junhyung; Kim, Taewhan

Area and Power Reduction of Embedded DSP Systems using Instruction Compression and Re-configurable Encoding
pp. 245-267(23)
Authors: Chandar, Subash; Mehendale, Mahesh; Govindarajan, R.

A HW/SW Partitioner for Multi-Mode Multi-Task Embedded Applications
pp. 269-283(15)
Authors: Kim, Young-Jun; Kim, Taewhan