The Journal of VLSI Signal Processing

Guest Editorial
pp. 5-6(2)
Authors: Schulte Michael; Bhattacharyya Shuvra; Schreiber Robert

Solving Out-of-Order Communication in Kahn Process Networks
pp. 7-18(12)
Authors: Turjan Alexandru; Kienhuis Bart; Deprettere Ed

Model-Based Exploration of the Design Space for Heterogeneous Systems on Chip
pp. 19-34(16)
Authors: Blume H.; Feldkaemper H.; Noll T.

New Complexity Results on Array Contraction and Related Problems
pp. 35-55(21)
Authors: Darte Alain; Huard Guillaume

VLSI Photonic Ring Multicomputer Interconnect: Architecture and Signal Processing Performance
pp. 57-72(16)
Authors: Chamberlain Roger; Franklin Mark; Krishnamurthy Praveen; Mahajan Abhijit

A Prototype Processing-In-Memory (PIM) Chip for the Data-Intensive Architecture (DIVA) System
pp. 73-84(12)
Authors: Draper Jaffrey; Barrett J.; Sondeen Jeff; Mediratta Sumit; Kang Chang; Kim Ihn; Daglikoca Gokhan

PLX: An Instruction Set Architecture and Testbed for Multimedia Information Processing
pp. 85-108(24)
Authors: Lee Ruby; Fiskiran A.

High-Radix Logarithm with Selection by Rounding: Algorithm and Implementation
pp. 109-123(15)
Authors: Piñeiro J.-A.; Ercegovac M.; Bruguera J.

New Models of Prefix Adder Topologies
pp. 125-141(17)
Author: Burgess Neil

Reviewing 4-to-2 Adders for Multi-Operand Addition
pp. 143-152(10)
Author: Kornerup Peter