The Journal of VLSI Signal Processing

Power Analysis of a General Convolution Algorithm Mapped on a Linear Processor Array
pp. 5-19(15)
Authors: Manniesing R.; Kleihorst R.; van der Avoird A.; Hendriks E.

CORDIC Processor for Variable-Precision Interval Arithmetic
pp. 21-39(19)
Authors: Hormigo J.; Villalba J.; Zapata E.L.

Fractional Rate Dataflow Model for Efficient Code Synthesis
pp. 41-51(11)
Authors: Oh H.; Ha S.

Combined Application of Data Transfer and Storage Optimizing Transformations and Subword Parallelism Exploitation for Power Consumption and Execution Time Reduction in VLIW Multimedia Processors
pp. 53-73(21)
Authors: Masselos K.; Catthoor F.; Goutis C.E.; DeMan H.

Introduction: Special Section on System Level Design
pp. 75-76(2)
Author: Smailagic A.

Design Considerations for Energy-Efficient Radios in Wireless Microsensor Networks
pp. 77-94(18)
Authors: Shih E.; Cho S.; Lee F.S.; Calhoun B.H.; Chandrakasan A.

A Low-Power Heterogeneous Multiprocessor Architecture for Audio Signal Processing
pp. 95-110(16)
Authors: Paker Ö.; Sparsø J.; Haandbæk N.; Isager M.; Nielsen L.S.

A Low Power Architecture for HASM Motion Tracking
pp. 111-127(17)
Authors: Badawy W.; Bayoumi M.

Instruction Scheduling for Low Power
pp. 129-149(21)
Authors: Parikh A.; Kim S.; Kandemir M.; Vijaykrishnan N.; Irwin M.J.

Net Clustering Based Constructive and Iterative Improvement Approaches for Macro-Cell Placement
pp. 151-163(13)
Authors: Alupoaei S.; Katkoori S.