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Publisher: Springer

Volume 32, Number 3, November 2002
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Evaluation of CORDIC Algorithms for FPGA Design
pp. 207-222(16)
Authors: Valls J.; Kuhlmann M.; Parhi K.K.

A Systolic, High Speed Architecture for an RSA Cryptosystem
pp. 223-235(13)
Authors: Pekmestzi K.Z.; Moshopoulos N.K.

Polyphase Filter Approach for High Performance, FPGA-Based Quadrature Demodulation
pp. 237-254(18)
Authors: Langlois J.M.P.; Al-Khalili D.; Inkol R.J.

A Configurable Architecture for the Wavelet Packet Transform
pp. 255-273(19)
Authors: Trenas M.A.; López J.; Zapata E.L.; Argüello F.

Modelling ARQ for a High-Speed ATM-Based Wireless LAN
pp. 275-286(12)
Authors: Smulders P.F.M.; de Gier M.F.H.

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