Square Root Domain Filter Design and Performance
Authors: Eskiyerli M.1; Payne A.2
Source: Analog Integrated Circuits and Signal Processing, Volume 22, Numbers 2-3, March 2000 , pp. 231-243(13)
Publisher: Springer
Abstract:
This paper discusses the implementation and performance of square root domain filters, which can be considered as the CMOS equivalent of the bipolar log domain technique. The square root design methodology is based on exploiting the MOSFET large-signal square law characteristic to implement filters which are input-output linear, but operate with internally non-linear signals. The design of subcircuits required for the implementation of square root domain filters is described based on the MOSFET translinear principle, and various performance issues are discussed. Simulation and measured results are also presented to confirm the validity of this approach, which may be attractive for low-voltage operation at frequencies in the MHz range.
Keywords: analog integrated circuits; analog filters; CMOS translinear circuits
Language: English
Document Type: Regular paper
Affiliations: 1: Department of Electrical and Electronic Engineering, Imperial College of Science, Technology and Medicine, Exhibition Road, London, SW7 2BT, UK 2: Sony Semiconductor of America, Mixed Signal Division, 33000, Zanker Road, San Jose, CA 95134, USA
Publication date: 2000-03-01
- In this: publication
- By this: publisher
- In this Subject: Electrical & Nuclear Engineering
- By this author: Eskiyerli M. ; Payne A.

Shopping cart
Receive new issue alert