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Nanoscale Patterning of Organic and Metallic Features on Semiconductors via Self-Assembly of Soft Materials

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Nanostructured materials continue to be the focus of intense research due to their promise of innumerable practical applications as well as advancing the fundamental understanding of these intriguing materials. In particular, the need for metallic and organic features of increasingly smaller size regimes has imposed stringent demands upon chemists to produce a variety of highly functional materials with reduced dimensions. The successful realization of arrayed nanosensor and nanoelectrode production, molecular electronics, ultra large scale integration (ULSI) device fabrication, and nanoelectromechanical systems (NEMS) will require unparalleled precision and control of geometry, aspect ratio, surface morphology, deposition rate, and substrate adhesion without sacrificing throughput or cost effectiveness. While much effort has been expended towards the synthesis of nanoscale structures, one of the most challenging aspects for the nanoscale materials community is the question of how to ‘wire in’ these functional elements with the real world. In this talk, we will describe recent work towards the interfacing of nanoscale patterns of organic molecular and metallic structures with semiconductor surfaces such as silicon, germanium, gallium arsenide and indium phosphide. We have developed a repertoire of chemical reactivities on semiconductor interfaces, and are now patterning them through straightforward and efficient, highly parallel patterning strategies via self-assembly of soft polymer materials. The self-assembled materials direct transport of reagents to the semiconductor so that the reaction takes place in a spatially defined manner, with precise control over the quantity of reagent delivered. Even mixtures of reagents can be ‘sorted out’ by these interfaces to produce nanoscale (∼10 nm) domains of different chemical functionalities, simultaneously. We will describe these and related approaches towards precise patterning of semiconductor surfaces, entirely via wet-chemical processes that are compatible with existing fabrication strategies.

Document Type: Research Article

Publication date: January 1, 2005

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