A review of high-level synthesis for dynamically reconfigurable FPGAs

Authors: Zhang X.; Ng K.W.

Source: Microprocessors and Microsystems, Volume 24, Number 4, 1 August 2000 , pp. 199-211(13)

Publisher: Elsevier

Keywords: Field programmable gate arrays; Dynamically reconfigurable systems; High-level synthesis

Language: English

Document Type: Research article

DOI: http://dx.doi.org/10.1016/S0141-9331(00)00074-0

Affiliations: 1: aDepartment of Computer Science and Engineering, The Chinese University of Hong Kong, Shatin, N.T., , Hong Kong, China

Publication date: 2000-08-01

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• By this author: Zhang X. ;  Ng K.W.

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