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Publisher: Elsevier

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Volume 23, Number 6, 1 November 1997

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Multiplex computing system based on set-valued logic
pp. 381-392(12)
Authors: Higuchi, T.; Aoki, T.

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PWM signal processing architecture for intelligent systems
pp. 393-405(13)
Authors: Nagata, M.; Iwata, A.

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Event recognition hardware based on neuron MOS soft-computing circuits
pp. 415-429(15)
Authors: Shibata, T.; Yamashita, Y.; Konda, M.; Morimoto, T.; Ohmi, T.

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Ferroelectric neuron circuits with adaptive-learning function
pp. 431-438(8)
Authors: Ishiwara, H.; Aoyama, Y.; Okada, S.; Shimamura, C.; Tokumitsu, E.

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A functional MOS circuit for implementing cellular-automaton picture-processing devices
pp. 439-451(13)
Authors: Ikebe, M.; Akazawa, M.; Amemiya, Y.

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A tree structure of automata for selective image scanning and its implementation
pp. 453-461(9)
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Image compression sensor based on column parallel architecture
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