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Programming/Erasing Characteristics of Hysteresis-Based Nonvolatile Memory Devices of Single-Wall Carbon Nanotubes

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Hysteresis effect in carbon nanotube field-effect transistors can be commonly employed to construct the nonvolatile memory devices of single-wall carbon nanotubes. In this paper, we investigate in detail the programming/erasing characteristics of such memory devices, which may present great importance for their availabilities. In order to write and erase the memory devices with reproducibility and stability, it is essential to set the writing and erasing time appropriately. The writing and erasing process of such memory devices is, in general, found to be much slower compared with traditional CMOS memory devices, typically operating on a time scale of the order of a second, which may pose a serious challenge to their practical exploitation. Furthermore, the stability of charge storage in such memories is slightly affected by temperature. A model based on electric polarization of surface-bound water molecules on SiO2 insulator has also been proposed to explain qualitatively the hysteresis and memory effect of these devices.

Keywords: Carbon nanotube; hysteresis; nonvolatile memory; transistor

Document Type: Research Article

Publication date: August 1, 2008

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  • Current Nanoscience publishes authoritative reviews and original research reports, written by experts in the field on all the most recent advances in nanoscience and nanotechnology. All aspects of the field are represented including nano- structures, synthesis, properties, assembly and devices. Applications of nanoscience in biotechnology, medicine, pharmaceuticals, physics, material science and electronics are also covered. The journal is essential to all involved in nanoscience and its applied areas.
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