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A Simple Capacitive Sensor with Digital-Compatibility Output

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This paper presents a simple current-mode interface circuit for capacitive sensing, with the main features being its capability to produce a digital representation of the sensing output and an extended detecting range. The main concept of the proposed capacitive sensing circuit is to replace the originally used operational amplifier (op amp) with a simple current subtraction circuit and then produce the associated digital output with the Schmitt trigger circuit. The biasing currents required for the op amp can be eliminated to reduce power consumption and active area. The circuit is initially activated by comparing the detected capacitor with a reference one. Next, an electrical current is resulted from the comparison result and is used to charge or discharge another capacitor. Finally, the charged or discharged voltage is converted into its digital representation using the Schmitt trigger circuit. The associated digital output is easier to be observed when compared with its analog counterpart. These advantages of simple circuit structure, reduced number of bias current, high sensitive digital output, and high output readability make the proposed sensor be a potential candidate for practical application. The circuit has been simulated in a 0.18- m 1P6M CMOS technology with a nominal capacitor of 1 pF. When the sensing capacitor is deviated from 1 pF to 1.5 pF, the associated detecting error is ranged from –0.63% to 0.16%. When the sensing capacitor is deviated from 1 pF to 0.5 pF, the associated detecting error is ranged from –0.73% to 0.86%. The simulated results show that the proposed capacitive sensing circuit has the potential to be exploited in many sensor applications.


Document Type: Research Article


Publication date: May 1, 2012

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