A novel built-in current sensor structure, including designs and physical implementations, is presented for on-chip current testing in deep-submicron circuits with ultra low-voltage power supply. The regular current test methods, based on a voltage drop sensing over a resistive element,
exhibit unwanted supply voltage degradation for the device under test (DUT). This voltage drop might be accepted at relatively high supply voltage technologies, but this might cause undesirable effects in low voltage technologies. The advantage of the proposed current sensor, which is based
on split-drain magnetic FET (MAGFET), is mainly elimination of the undesired supply voltage reduction. Optimizing the electromagnetic performance of the MAGFET sensors requires a deep knowledge of the electro-magnetic force interaction when the device is exposed to a magnetic field. Therefore,
an analytical model of the sensitivity of MAGFET is presented to carry out full geometrical analyzes of MAGFET. The model includes secondary and parasitic geometric effects as well as operating point dependencies. Furthermore, the analysis of the influence of various device structures and
dimensions on their electro-physical parameters and electrical characteristics is presented. Supported by 3D process and device simulations using Synopsys TCAD simulation tools, fully three-dimensional simulation are implement to investigate the sensitivity of different sensor parameters.
The rigorous test show that sensitivity of MAGFET depends on structure geometry, dimensions and biasing conditions. In addition, the results of comparison indicate that the sensitivity model of current sensor is validated.
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