Energy Consumption Optimized Scheduling Algorithm for Clustered VLIW Architectures
Authors: Xu, Yang; Hu, He; Zhizhong, Tang
Source: Journal of Low Power Electronics, Volume 8, Number 2, April 2012 , pp. 146-157(12)
Publisher: American Scientific Publishers
Abstract:This work presents an approach for reducing the energy consumption for instruction scheduling of clustered VLIW architectures. The proposed scheme is based on a preliminary cluster assignment phase implemented through the partitioning and analyzing of Data Dependence Graph (DDG), a scheduling phase using figure of merit to compare influence of partial schedules on energy consumption, and a backtracking optimization phase to perform further improvement on energy consumption. The preliminary cluster assign scheme is shown to be very effective due to its global view of the whole DDG. We have implemented and evaluated the proposed scheme with UTDSP and MediaBench benchmarks. Results show a significant reduction in energy consumption when compared with previously proposed techniques, while also maintaining a high performance level. Energy consumption reductions are up to 45%, with average energy consumption improving ranging from 29.44% to 31.59%. Performance speedup can up to 65% compared with result of list scheduling, with average speedup ranging from 40.85% to 41.71%.
Document Type: Research Article
Publication date: April 2012
- The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.
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