A Novel Synthetic Traffic Pattern for Power/Performance Analysis of Network-on-Chips Using Negative Exponential Distribution

Authors: Rahmani, Amir-Mohammad; Afzali-Kusha, Ali; Pedram, Massoud

Source: Journal of Low Power Electronics, Volume 5, Number 3, October 2009 , pp. 396-405(10)

Publisher: American Scientific Publishers

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Abstract:

In this paper, we present an empirically-derived synthetic traffic model based on the Negative Exponential Distribution (NED) for homogenous and heterogeneous Network-on-chips (NoCs) with any dimensionality. Compared to conventional synthetic traffic profiles, this synthetic traffic profile accurately captures key statistical behavior of realistic traces obtained by running different applications on Network-on-chips. To assess the usefulness of this new NoC traffic model, the average packet hops for the proposed traffic profile is compared with those of some synthetic and realistic traffic patterns. The results show that the NED traffic profile has more similarity with the realistic traffic profiles than those of conventional synthetic ones. Adding this traffic profile to the existing profiles, improves the design and characterization of NoCs.

Keywords: NETWORK-ON-CHIPS; POWER/PERFORMANCE ANALYSIS; NEGATIVE EXPONENTIAL DISTRIBUTION

Document Type: Research article

DOI: http://dx.doi.org/10.1166/jolpe.2009.1039

Publication date: 2009-10-01

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The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.
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