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The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.

Publisher: American Scientific Publishers

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Volume 5, Number 1, April 2009

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Research Articles

Adaptive Global Elimination Algorithm for Low Power Motion Estimation
pp. 1-16(16)
Authors: Gupte, Ajit; Bharadwaj, Amrutur

Design of Low Power Parallel Multiplier
pp. 31-39(9)
Authors: Badghare, Rahul M.; Mangal, Sanjiv Kumar; Deshmukh, Raghavendra B.; Patrikar, Rajendra M.

Design of Low Power Adiabatic SRAM Using DTGAL, CPAL and ACPL: A Comparative Study
pp. 40-49(10)
Authors: Sudharshan, Y.K.; Sreenu, D.; Saxena, A.K.; Dasgupta, S.

Test Power Reduction Using Integrated Scan Cell and Test Vector Reordering Techniques on Linear Scan and Double Tree Scan Architectures
pp. 58-68(11)
Authors: Kurian, George; Rao, Narayana; Patidar, Virendra; Kamakoti, V.; Ravi, Srivaths

A Special Section

Research Articles

Statistical Power Analysis for High-Performance Processors
pp. 70-76(7)
Authors: Chen, Howard; Neely, Scott; Xiong, Jinjun; Zolotov, Vladimir; Visweswariah, Chandu

Low-Power Coding for Networks-on-Chip with Virtual Channels
pp. 77-84(8)
Authors: García-Ortiz, Alberto; Indrusiak, Leandro S.; Murgan, Tudor; Glesner, Manfred

Low Energy ASIC Elliptic Curve Processor
pp. 85-95(11)
Authors: Keller, Maurice; Marnane, William P.

Power-Efficient Reconfiguration Control in Coarse-Grained Dynamically Reconfigurable Architectures
pp. 96-105(10)
Authors: Kissler, Dmitrij; Strawetz, Andreas; Hannig, Frank; Teich, Jürgen

Intelligate: An Algorithm for Learning Boolean Functions for Dynamic Power Reduction
pp. 106-112(7)
Authors: Wiener, Roni; Kamhi, Gila; Vardi, Moshe Y.

Exploiting Temporal Discharge Current Information to Improve the Efficiency of Clustered Power-Gating
pp. 113-121(9)
Authors: Sathanur, A.; Benini, L.; Macii, A.; Macii, E.; Poncino, M.

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