Optimisation of Gate-Drain/Source Overlap in 90 nm NMOSFETs for Low Noise Amplifier Performance

Authors: Srinivasan, R.; Bhat, Navakanta

Source: Journal of Low Power Electronics, Volume 4, Number 2, August 2008 , pp. 240-246(7)

Publisher: American Scientific Publishers

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Abstract:

The effect of gate-drain/source overlap (L_OV) on LNA performance has been studied, in 90 nm NMOSFETs using process, device and mixed mode simulations. In order to have a fair comparison, the off-state leakage current (I_OFF) of MOSFETs is kept constant by adjusting the pocket halo dose as a function of varying L_OV. A basic LNA circuit with two transistors in cascode arrangement is constructed and the input impedance, gain and noise-figure have been used as performance metrics. It has been shown that 'control over L_OV' allows us to get better power and noise performance from the LNA i.e., it allows us to get minimum noise figure (NF) and maximum gain from the LNA. To get the better noise performance and gain, L_OV in the range of 0-10 nm is recommended.

Keywords: MOSFET; OVERLAP; LNA; NOISE-FIGURE; TCAD

Document Type: Research article

DOI: http://dx.doi.org/10.1166/jolpe.2008.256

Publication date: 2008-08-01

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The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.
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