Journal of Low Power Electronics

Energy-Aware Task Scheduling and Dynamic Voltage Scaling in a Real-Time System
pp. 1-10(10)
Authors: Rong, Peng; Pedram, Massoud

Survey of Hardware Systems for Wireless Sensor Networks
pp. 11-20(10)
Authors: Hempstead, Mark; Lyons, Michael J.; Brooks, David; Wei, Gu-Yeon

High-Level Interconnect Delay and Power Estimation
pp. 21-33(13)
Authors: Courtay, Antoine; Sentieys, Olivier; Laurent, Johann; Julien, Nathalie

Designing a General-Purpose Interconnection Architecture for Field Programmable Gate Arrays
pp. 34-47(14)
Authors: Siozios, Kostas; Soudris, Dimitrios; Thanailakis, Antonios

Design and Analysis of a Low Power Multi-Threshold CMOS Based ARM926 System
pp. 48-59(12)
Authors: Idgunji, Sachin; Flynn, David

A Novel Low Power Oriented Design Methodology for Analog Blocks
pp. 60-67(8)
Authors: Aziza, Hassen; Bergeret, Emmanuel; Portal, J.-Michel; Ginez, Olivier

Multi-Attribute Optimization with Application to Leakage-Delay Trade-Offs Using Utility Theory
pp. 68-80(13)
Authors: Bhardwaj, Sarvesh; Vrudhula, Sarma

Low Power Test for Nanometer System-on-Chips (SoCs)
pp. 81-100(20)
Authors: Ravi, Srivaths; Parekhji, Rubin; Saxena, Jayashree

A Novel Power-Managed Scan Architecture for Test Power and Test Time Reduction
pp. 101-110(10)
Authors: Devanathan, V.R.; Ravikumar, C.P.; Mehrotra, Rajat; Kamakoti, V.