Journal of Low Power Electronics

Exploring Very Low-Energy Logic: A Case Study
pp. 223-233(11)
Authors: Alarcón, L.P.; Liu, T.T.; Pierson, M.D.; Rabaey, J.M.

Low Power and Energy Efficient Asynchronous Design
pp. 234-253(20)
Authors: Beerel, Peter A.; Roncken, Marly E.

Computation Partitioning and Reuse for Power Efficient High Performance Digital Signal Processing
pp. 254-270(17)
Authors: Banerjee, Nilanjan; Roy, Kaushik

Architectural Power Analysis for Intellectual Property-Based Digital System
pp. 271-279(9)
Authors: Durrani, Yaseer A.; Riesgo, Teresa

Controllability-Driven Peak Dynamic Power Estimation for VLSI Circuits
pp. 280-292(13)
Authors: Najeeb, K.; Gururaj, Karthik; Kamakoti, V.; Vedula, Vivekananda M.

Static Power Analysis and Estimation in Ternary Content Addressable Memory Cells
pp. 293-301(9)
Authors: Kudithipudi, Dhireesha; John, Eugene

Energy-Efficient Techniques for Disk-Based Mobile Systems
pp. 302-317(16)
Authors: Kim, Young-Jin; Kim, Jihong

Timing-Aware Power Minimization via Extended Timing Graph Methods
pp. 318-326(9)
Authors: Qian, Haifeng; Acar, Emrah

A Low Power Design for Sbox Cryptographic Primitive of Advanced Encryption Standard for Mobile End-Users
pp. 327-336(10)
Authors: Selimis, George N.; Kakarountas, Athanasios P.; Fournaris, Apostolos P.; Milidonis, Athanasios; Koufopavlou, Odysseas

Investigations on Short-Circuit Power Dissipation in Repeater Loaded VLSI Interconnects
pp. 337-344(8)
Authors: Chandel, Rajeevan; Sarkar, Sankar; Chandel, Ashwani

Tradeoffs in Design of Low-Power Gated-Oscillator Clock and Data Recovery Circuits
pp. 345-354(10)
Authors: Tajalli, Armin; Muller, Paul; Leblebici, Yusuf