Journal of Low Power Electronics logo American Scientific Publishers logo

The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.

Publisher: American Scientific Publishers

Volume 3, Number 1, April 2007
Key:
Free Content - Free Content
New Content - New Content
Subscribed Content - Subscribed Content
Free Trial Content - Free Trial Content

< previous issue | next issue > | all issues

Research Articles

TILTS: A Fast Architectural-Level Transient Thermal Simulation Method
pp. 13-21(9)
Authors: Han, Yongkui; Koren, Israel; Krishna, C.M.

Heuristic on a Novel Power Management System Cooperating with Compiler
pp. 22-27(6)
Authors: Yang, Xu; He, Hu; Zhou, Zhixiong; Zhang, Yanjun; Sun, Yihe

Wakeup Scheduling in MTCMOS Circuits Using Successive Relaxation to Minimize Ground Bounce
pp. 28-35(8)
Authors: Ramalingam, Anand; Devgan, Anirudh; Pan, David Z.

A Low Power, Scalable and Runtime Customizable Microprocessor Architecture for Image Processing
pp. 36-42(7)
Authors: Notarangelo, Giuseppe; Pappalardo, Francesco; Salurso, Elena; Guidetti, Elio

Exploiting Speculation Cost Prediction in Power-Aware Applications
pp. 43-53(11)
Authors: Atoofian, Ehsan; Baniasadi, Amirali; Aasaraai, Kaveh

Efficiency of Low Power Circuit Techniques in a 65 nm SOI-Process
pp. 54-59(6)
Authors: Fenkes, Joachim; Gemmeke, Tobias; Leenstra, Jens

Design Techniques for Micro-Power Algorithmic Analog-to-Digital Converters
pp. 60-69(10)
Authors: Tucker, Steven D.; Ravindran, Arun; Wichman, Christopher; Mukherjee, Arindam

Improving the Performance of Static CMOS Gates by Using Independent Bodies
pp. 70-77(8)
Authors: Guerrero, D.; Millan, A.; Juan, J.; Bellido, M.J.; Ruiz-De-Clavijo, P.; Ostua, E.; Viejo, J.

Delay-Assignment-Variation Based Optimization of Digital CMOS Circuits for Low Power Consumption
pp. 78-95(18)
Authors: Dhillon, Yuvraj Singh; Diril, Abdulkadir Utku; Chatterjee, Abhijit

Low-Power Hierarchical Scan Test for Multiple Clock Domains
pp. 106-118(13)
Authors: Arasu, T. Senthil; Ravikumar, C.P.; Nandy, S.K.

< previous issue | next issue > | all issues

Key:
Free Content - Free Content
New Content - New Content
Subscribed Content - Subscribed Content
Free Trial Content - Free Trial Content
Share this item with others: These icons link to social bookmarking sites where readers can share and discover new web pages.
Page Help Click here for Page Help
Shopping cart
Tools
Sign in






Need to register?
Sign up here
Text size: A | A | A | A