Journal of Low Power Electronics

A Fast, Dynamic, Fine-Detail, Source Level Technique to Estimate the Energy Consumed by Embedded Software on Single-Issue Processor Cores
pp. 129-139(11)
Authors: Scarpazza, Daniele Paolo; Brandolese, Carlo

Reducing Instruction Translation Look-Aside Buffer Energy Through Compiler-Directed Resizing
pp. 140-147(8)
Authors: Allu, Bramha; Zhang, Wei

A Low-Energy Reconfigurable Fabric for the SuperCISC Architecture
pp. 148-164(17)
Authors: Mehta, Gayatri; Stander, Justin; Lucas, Josh; Hoare, Raymond R.; Hunsaker, Brady; Jones, Alex K.

Communication Power Optimization for Network-on-Chip Architectures
pp. 165-176(12)
Authors: Shin, Dongkun; Kim, Jihong

Temperature-Aware Floorplanning of 3-D ICs Considering Thermally Dependent Leakage Power
pp. 177-188(12)
Authors: Deng, Yangdong; Li, Peng

An Efficient Assignment of Voltages and Optional Cycles for Maximizing Rewards in Real-Time Systems with Energy Constraints
pp. 189-200(12)
Authors: Mahdoum, Ali; Badache, Nadjib; Bessalah, Hamid

Energy-Aware Dual-Rail Bit-Wise Completion Pipelined Arithmetic Circuit Design
pp. 201-216(16)
Authors: Di, Jia; Yuan, J.S.

Power Distribution Techniques for Dual VDD Circuits
pp. 217-229(13)
Authors: Kulkarni, Sarvesh H.; Sylvester, Dennis

Gate Sizing and V_t Assignment for Active-Mode Leakage Power Reduction
pp. 230-239(10)
Authors: Gao, Feng; Hayes, John P.

Statistical Leakage Minimization of Digital Circuits Using Gate Sizing, Gate Length Biasing, and Threshold Voltage Selection
pp. 240-250(11)
Authors: Bhardwaj, Sarvesh; Cao, Yu; Vrudhula, Sarma

Subthreshold to Above Threshold Level Shifter Design
pp. 251-258(8)
Authors: Chen, Tai-Hua; Chen, Jinhui; Clark, Lawrence T.

Power Optimized Design of CMOS Programmable Gain Amplifiers
pp. 259-270(12)
Authors: Mohan, Srikanth; Ravindran, Arun; Binkley, David; Mukherjee, Arindam

Reducing Power Dissipation in SRAM during Test
pp. 271-280(10)
Authors: Dilillo, Luigi; Rosinger, Paul; Al-Hashimi, Bashir M.; Girard, Patrick

Software Level Power Consumption Models and Power Saving Techniques for Embedded DSP Processors
pp. 281-290(10)
Authors: Bleakley, C.J.; Casas-Sanchez, Miguel; Rizo-Morente, Jose

Multiclock Domain and Dynamic Frequency Scaling Applied to the Control Unit of a Battery Powered for 1 cm³ Microrobot
pp. 291-299(9)
Authors: Casanova, Raimon; Dieguez, Angel; Arbat, Anna; Samitier, Josep

Low Power and High Performance Arithmetic Circuits in Feedthrough CMOS Logic Family for Low Power Applications
pp. 300-307(8)
Authors: Navarro-Botello, Victor; Montiel-Nelson, Juan A.; Nooshabadi, Saeid

Low-Voltage Low-Power Broadband CMOS Analogue Circuit for White Gaussian Noise Generation
pp. 308-316(9)
Authors: Evans, Guiomar; Goes, João; Paulino, Nuno

Super Class AB OTAs Based on Low-Power Adaptive Techniques at the Input Stage and the Active Load
pp. 317-324(8)
Authors: Galan, J.; Carvajal, Ramón G.; Ramírez-Angulo, J.; López-Martín, Antonio J.; Rubia-Marcos, C.