Journal of Low Power Electronics

Performance Evaluation of Dynamic Voltage Scaling Algorithms for Hard Real-Time Systems
pp. 207-216(10)
Authors: Kim, Woonseok; Shin, Dongkun; Yun, Han-Saem; Kim, Jihong; Min, Sang Lyul

Transition Activity Estimation for Digital Signal Processing Systems
pp. 217-225(9)
Authors: Calomarde, Antonio; Rubio, Antonio; Saludes, Jordi

Energy-Aware Dynamic Task Scheduling Applied to a Real-Time Multimedia Application on an Xscale Board
pp. 226-237(12)
Authors: Ykman-Couvreur, Chantal; Catthoor, Francky; Vounckx, Johan; Folens, Andy; Louagie, Filip

Algorithm/Architecture Co-exploration for Designing Energy Efficient Wireless Channel Estimator
pp. 238-248(11)
Authors: Meng, Yan; Gong, Wenrui; Kastner, Ryan; Sherwood, Timothy

Trading Time and Space on Low Power Embedded Architectures with Dynamic Instruction Merging
pp. 249-258(10)
Authors: Gomes, Victor F.; Beck, Antônio Carlos S.; Carro, Luigi

High-Level Synthesis for Low Power Hardware Implementation of Unscheduled Data-Dominated Circuits
pp. 259-272(14)
Authors: Tang, Xiaoyong; Jiang, Tianyi; Jones, Alex K.; Banerjee, Prithviraj

Early Quality Assessment for Low Power Behavioral Synthesis
pp. 273-285(13)
Authors: Kursun, Eren; Mukherjee, Rajarshi; Memik, Seda Ogrenci

Implementation of Low Power Digital Multipliers Using 10 Transistor Adder Blocks
pp. 286-296(11)
Authors: Kudithipudi, Dhireesha; John, Eugene

Microarchitecture Level Interconnect Modeling Considering Layout Optimization
pp. 297-308(12)
Authors: Liao, Weiping; He, Lei

Design and Test of a Novel Programmable Clock Generator Semi-Custom Core for Energy-Efficient Systems-on-Chips
pp. 309-318(10)
Authors: Olivieri, Mauro; Smorfa, Simone; Trifiletti, Alessandro

Efficient Test Set Modification for Capture Power Reduction
pp. 319-330(12)
Authors: Wen, Xiaoqing; Suzuki, Tatsuya; Kajihara, Seiji; Miyase, Kohei; Minamoto, Yoshihiro; Wang, Laung-Terng; Saluja, Kewal K.