Abstract:

FPGA based soft processors are an attractive choice for implementing many embedded applications. In these applications, energy efficiency is an important performance metric. Thus, techniques that can quickly and accurately obtain the energy performance of these soft processors are crucial for application development using soft processors. Energy estimation based on low-level simulation is too time-consuming for obtaining such energy performance. In this paper, we propose a two-step arithmetic-level instruction based technique which can rapidly and fairly accurately obtain the energy dissipation of computations on FPGA based soft processors. In the first step, energy dissipation of the instructions of the soft processor executed under various arithmetic scenarios is analyzed. An instruction energy look-up table is built based on the analysis. In the second step, we integrate an instruction set simulator with the instruction energy look-up table to estimate the energy dissipation of the software programs running on the soft processor. For illustrative purposes, we provide an implementation of our energy estimation technique for a state-of-the-art soft processor. Several signal and numerical processing software programs are used to demonstrate the effectiveness of our approach. For these software programs, our energy estimation technique achieves estimation errors ranging from 12.0% to 15.0% and 13.5% on the average compared with the results obtained through actual measurement on the FPGA device.

Keywords: ENERGY ESTIMATION; FPGA; SOFT PROCESSOR

Document Type: Research article

DOI: 10.1166/jolpe.2005.033