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Design and Simulation of a Sequence Generator using Single Electron Devices and Hybrid Architecture

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Recently, there is a considerable advancement in nanotechnology thereby making to isolate, control and exploit the properties of an electron. Such advancements have brought us close to the realization of classical logic gates, where binary bits are represented by the presence or absence of an electron or few electrons. Single electronics is an upgrading technology, which reveals new physical effect of charge transport. It has many advantages over existing bulk semiconductor device and great figure of merit. Single Electron Tunneling technology offer a possibility of achieving ultra high functional density and extremely low power dissipation compared with silicon based CMOS technology. In this work, a sequence generator circuit using Single Electron Device (SED) based threshold logic gates is presented. Also an attempt is made to implement the same circuit using Single Electron Transistor-Metal Oxide semiconductor Field Effect Transistor (SET-MOS) hybrid technology. The circuits are designed and simulated using SIMON, a Monte Carlo Simulator for SED and conventional SPICE simulator. The stability of its operation has been studied and analyzed by energy history diagram. The schematic diagram and simulation results are included. Further, the proposed scheme may be used for realization of a sequence of any complexity.


Document Type: Research Article


Publication date: December 1, 2010

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  • Journal of Nanoelectronics and Optoelectronics (JNO) is an international and cross-disciplinary peer reviewed journal to consolidate emerging experimental and theoretical research activities in the areas of nanoscale electronic and optoelectronic materials and devices into a single and unique reference source. JNO aims to facilitate the dissemination of interdisciplinary research results in the inter-related and converging fields of nanoelectronics and optoelectronics.
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