Stress Impact of a Tensile Contact Etch Stop Layer on Nanoscale Strained NMOSFETs Embedded with a Silicon–Carbon Alloy Stressor
For the purpose of enhancing performance in NMOSFETs, inducing an ever increasing tensile stress along Si channel direction is beneficial through the use of advanced strained engineering. By means of the lattice mismatched SiC with different carbon mole fraction, integrated with tensile contact etch stop layer (CESL), the obtainment of significant mobility gain is expected. In the present research, the stress distribution in NMOSFETs with the combinations of Silicon–Carbon (SiC) stressor and tensile CESL is systematically studied by using three-dimensional (3D) finite element analysis (FEA). Width dependency in conjunction with different nanoscale gate length is also analyzed. The analysis results indicate that the stress impact of SiC stressor resulting from the stress component along channel direction on Si region dominates and tensile CESL could enhance this effect. Further important is that the vertical stress within NMOSFETs, is raised greatly due to tensile CESL through the examined range of gate widths, especially for narrower width. Therefore, the predicted results reveal excellent mobility gain through such strain engineering.
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Document Type: Research Article
Publication date: 01 July 2012
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