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An Explicit Continuous Analytical Model for Gate All Around (GAA) MOSFETs Including the Hot-Carrier Degradation Effects

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In this paper, an explicit and continuous analytical model including interfacial hot-carrier effects is developed for a deep submicron Gate All Around (GAA) MOSFETs. Explicit analytical expressions of the surface potential, drain current and transconductance are given for all operating modes. Exploiting this new device model, we have found that the incorporation of a high-k layer, Gate Stack (GS), between oxide region and gate metal leads to drain current enhancement, improved transconductance parameter and enhanced interfacial hot-carrier immunity. The developed approaches are verified and validated by the good agreement found with the 2D numerical simulations for wide range of device parameters and bias conditions. GS GAA MOSFET design can alleviate the critical problem and further improve the immunity of hot-carrier effects of GAA MOSFET-based circuits in the deep submicron working domain.


Document Type: Research Article


Publication date: 2011-10-01

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  • Journal for Nanoscience and Nanotechnology (JNN) is an international and multidisciplinary peer-reviewed journal with a wide-ranging coverage, consolidating research activities in all areas of nanoscience and nanotechnology into a single and unique reference source. JNN is the first cross-disciplinary journal to publish original full research articles, rapid communications of important new scientific and technological findings, timely state-of-the-art reviews with author's photo and short biography, and current research news encompassing the fundamental and applied research in all disciplines of science, engineering and medicine.
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