Impact of Drift Gap, N-Layer, and Deep N+ Sinker on Breakdown Voltage and Saturation Current of Lateral Double-Diffused Metal Oxide Semiconductor Transistor
Abstract:In this paper, we discuss on the optimal design of a High-Side n-channel Lateral Double-diffused Metal Oxide Semiconductor Field Effect Transistor (LDMOSFET) whose breakdown voltage is over 100 V with 0.35 μm Bipolar-CMOS-DMOS (BCD) process. The proposed nLDMOSFET has been fabricated and tested in order to confirm the features of a deep N+ sinker and a gap of between the drift region (DEEP N-WELL) and the center of the source. The surface is implanted by the N-layer for high breakdown voltage and simultaneously the low specific on-resistance. The computer simulation of the proposed High-Side LDMOS exhibits BVdss of 115 V and Ron, sp of as low as 2.20 mΩ·cm2, which is consistent with the experimental results.
Document Type: Research Article
Publication date: August 1, 2011
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