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Nonvolatile Floating-Gate Memories Using Zr and ZrO2 Nanodots

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Triple-layer structures of SiO2/Zr nanodots (NDs)/SiO2 for nonvolatile memories have been firstly fabricated at room temperature by using ion beam sputtering deposition (IBSD). High-resolution transmission electron microscopy and X-ray photoelectron spectroscopy demonstrate that Zr NDs self-assembled between the SiO2 layers by IBSD are changed into ZrO2 NDs by annealing. The memory window that is estimated by capacitance–voltage curves increases up to a maximum value of 5.8 V with increasing Zr amount up to 6 monolayers for the annealed samples. The memory window and the charge-loss rate at the programmed state are smaller before annealing, which is explained with reference to double oxide barriers of SiO2 and ZrO2.
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Keywords: DOUBLE OXIDE BARRIER; NONVOLATILE MEMORIES; ZR NANODOTS

Document Type: Research Article

Publication date: 2011-01-01

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  • Journal for Nanoscience and Nanotechnology (JNN) is an international and multidisciplinary peer-reviewed journal with a wide-ranging coverage, consolidating research activities in all areas of nanoscience and nanotechnology into a single and unique reference source. JNN is the first cross-disciplinary journal to publish original full research articles, rapid communications of important new scientific and technological findings, timely state-of-the-art reviews with author's photo and short biography, and current research news encompassing the fundamental and applied research in all disciplines of science, engineering and medicine.
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