Diodes within individual silicon nanowires were fabricated by doping them during growth to produce p–n junctions. Electron beam lithography was then employed to contact p- and n-doped ends of these nanowires. The current–voltage (I–V) measurements showed diode-like characteristics with a typical threshold voltage (Vt) of about 1 V and an ideality factor (n) of about 3.6 in the quasi-neutral region. The reverse bias I–V measurement showed an exponential behavior, indicating tunneling as the current leakage mechanism.
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