Template Guided Self-Assembling Two-Dimensional Array of Au@SiO2 Core–Shell Nanoparticles for Room-Temperature Single Electron Transistors

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The composite nanoparticles of a gold core capped by a SiO2 shell with well-controlled thickness have been synthesized and fabricated into two-dimensional array on silicon surface by a simple self-assembly method combined with an AFM nanolithography technique. Current–voltage measurements of the Au@SiO2 composite nanoparticles (shell thickness of 6 nm) show a well-pronounced Coulomb staircase with a period of 300 mV at room temperature, demonstrating single electron transistor behavior. The step width of the Coulomb staircase can be tuned by controlling the thickness of SiO2 shell. The tunable single electron tunneling properties make the 2D array of Au@SiO2 composite nanoparticles an ideal candidate for planar single electron transistor devices.


Document Type: Short Communication

DOI: http://dx.doi.org/10.1166/jnn.2005.041

Publication date: February 1, 2005

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  • Journal for Nanoscience and Nanotechnology (JNN) is an international and multidisciplinary peer-reviewed journal with a wide-ranging coverage, consolidating research activities in all areas of nanoscience and nanotechnology into a single and unique reference source. JNN is the first cross-disciplinary journal to publish original full research articles, rapid communications of important new scientific and technological findings, timely state-of-the-art reviews with author's photo and short biography, and current research news encompassing the fundamental and applied research in all disciplines of science, engineering and medicine.
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