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A Majority-Logic Nanodevice Using a Balanced Pair of Single-Electron Boxes

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This paper describes a majority-logic gate device that will be useful in developing single-electron integrated circuits. The gate device consists of two identical single-electron boxes combined to form a balanced pair. It accepts three inputs and produces a majority-logic output by using imbalances caused by the input signals; it produces a 1 output if two or three inputs are 1, and a 0 output if two or three inputs are 0. We combine these gate devices into two subsystems, a shift register and an adder, and demonstrate their operation by computer simulation. We also propose a method of fabricating the unit element of the gate device, a minute dot with four coupling arms. We demonstrate by experiments that it is possible to arrange these unit elements on a GaAs substrate, in a self-organizing manner, by means of a process technology that is based on selective-area metalorganic vapor-phase epitaxy.
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Document Type: Research Article

Affiliations: 1: Department of Electrical Engineering, Hokkaido University 2: Research Center for Integrated Quantum Electronics, Hokkaido University, Sapporo 060-8628, Japan

Publication date: 2002-07-01

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  • Journal for Nanoscience and Nanotechnology (JNN) is an international and multidisciplinary peer-reviewed journal with a wide-ranging coverage, consolidating research activities in all areas of nanoscience and nanotechnology into a single and unique reference source. JNN is the first cross-disciplinary journal to publish original full research articles, rapid communications of important new scientific and technological findings, timely state-of-the-art reviews with author's photo and short biography, and current research news encompassing the fundamental and applied research in all disciplines of science, engineering and medicine.
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